Multi-active area semiconductor structure and method for manufacturing same
US12396293B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 20, 2022 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Jul 20, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/824
Abstract
A multi-active area semiconductor structure and a method for manufacturing same. The multi-active area semiconductor structure includes: a (2k−1)th common confining layer arranged between a kth active layer and a kth tunnel junction and in contact with the kth tunnel junction; and a 2kth common confining layer arranged between the kth active layer and a (k+1)th tunnel junction and in contact with the kth tunnel junction, where a forbidden band width of a kth quantum well layer is less than both a forbidden band width of a kth first-semiconductor layer and a forbidden band width of a kth second-semiconductor layer; a total thickness of the (2k−1)th common confining layer and the 2kth common confining layer is greater than a critical optical field coupling thickness and less than or equal to twice the critical optical field coupling thickness; and a thickness of the kth quantum well layer is less than or equal to 1/10 of a thickness of the (2k−1)th common confining layer, and the thickness of the kth quantum well layer is less than or equal to 1/10 of a thickness of the 2kth common confining layer. The multi-active area semiconductor structure has effectively improved light-emission …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.