Method for fabricating semiconductor structure and semiconductor structure
US12396369B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 23, 2022 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | May 29, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The fabricating method includes: providing a substrate including an array region and a peripheral region; and forming, on the substrate, a first mask layer covering the array region and the peripheral region, the first mask layer having a first device structure pattern directly facing the array region and a second device structure pattern directly facing the peripheral region. Through the method for fabricating a semiconductor structure, the first mask layer having the first device structure pattern and the second device structure pattern is formed on the substrate, and then the substrate is etched by using the first device structure pattern and the second device structure pattern as mask layer to synchronously form a peripheral region structure and an array region structure on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.