Test element group and test device including the same
US12399212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | May 11, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A test device includes semiconductor substrate, gate lines disposed on an upper surface of the semiconductor substrate and extending in a first direction parallel to the upper surface, a test element group including test transistors defined by the gate lines and by active regions extending in a second direction perpendicular to the first direction and intersecting the gate lines, and metal wirings disposed on the semiconductor substrate and electrically connected to the active regions and/or the gate lines, and a test circuit electrically connected to the metal wirings and configured to measure resistance of the test transistors. The gate lines include first gate lines and second gate lines disposed alternately, with the spacing between first gate lines and second gate lines alternating between a first distance and a second distance greater than the first distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.