Inter-processor communication method, electronic assembly, and electronic device
US12399859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Oct 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/163
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An inter-processor communication method, an electronic assembly, and an electronic device are provided. The electronic device at least includes a first core and a second core. A plurality of communication channels is defined between the first core and the second core. Each of the plurality of communication channels having a communication performance different from each other. The inter-processor communication method includes: acquiring to-be-transmitted data, the to-be-transmitted data is data transmitted between the first core and the second core; acquiring a corresponding communication channel corresponding to the to-be-transmitted data from the plurality of communication channels as a target communication channel; transmitting the to-be-transmitted data via the target communication channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.