Load matching for a current-steering digital-to-analog converter
US12401374B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 24, 2023 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Sep 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/68
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Certain aspects of the present disclosure are directed towards a digital-to-analog converter (DAC) system. The DAC system generally includes a first driver and a plurality of current-steering cells. A first current-steering cell of the plurality of current-steering cells includes: a first current source coupled to a first current-steering transistor and a second current-steering transistor, wherein a gate of the first current-steering transistor and a gate of the second current-steering transistor are coupled to a first output and a second output of the first driver, respectively; a first transistor having a source coupled to a current source path and a drain coupled to a reference potential node; and a second transistor having a source coupled to the current source path and a drain coupled to the reference potential node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.