Integrated circuit device and method for fabricating the same
US12402334B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jan 20, 2022 |
| Grant date | Aug 26, 2025 |
| Priority date | — |
| Expiry date | Mar 11, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a semiconductor structure, a tunneling layer, a top electrode, a passivation layer, and a conductive feature. The semiconductor structure has a base portion and a protruding portion over a top surface of the base portion. The tunneling layer is over a top surface of the protruding portion of the semiconductor structure. The top electrode is over the tunneling layer. The passivation layer is over a sidewall of the protruding portion of the semiconductor structure. The conductive feature is directly below the protruding portion of the semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.