Voltage sampler and solid-state transformer
US12405292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2022 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Mar 12, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/1427
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
This application provides a voltage sampler and a solid-state transformer. The voltage sampler includes a conductive housing, at least one sampling board located inside the housing, and a conducting layer. Each sampling board includes at least two resistors and a voltage input end. The resistors in the sampling board are electrically connected in sequence in the direction from a first end to a second end. The resistor at the first end is electrically connected to the voltage input end. The resistor at the second end is electrically connected to the housing, and the housing is electrically connected to a fixed potential end. The conducting layer is disposed between the at least one sampling board and the housing in the voltage sampler. The conducting layer is electrically connected to a resistor in the sampling board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.