Integrated current monitor
US12405301B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2023 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Jan 1, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6872
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Circuitry and a method of determining electrical characteristics of material local to a specific area of a semiconductor wafer. In one embodiment, the method includes sinking or sourcing current through a selected on of a plurality of devices under test (DUTs) on the semiconductor wafer, converting the current sourcing or sinking into a voltage, comparing the converted voltage against a linear voltage ramp, generating an output clock based on the comparison, and measuring a duty cycle of the output clock. In one embodiment, the duty cycle of the output clock is dependent on the current sinking or sourcing through the selected at least one of the plurality of DUTs on the wafer and electrical characteristics of material local to the specific area of the wafer where the selected one of the plurality of DUTs is located are determined based on the duty cycle of the output clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.