Matrix transpose and multiply
US12405770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2024 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Mar 15, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments for a matrix transpose and multiply operation are disclosed. In an embodiment, a processor includes a decoder and execution circuitry. The decoder is to decode an instruction having a format including an opcode field to specify an opcode, a first destination operand field to specify a destination matrix location, a first source operand field to specify a first source matrix location, and a second source operand field to specify a second source matrix location. The execution circuitry is to, in response to the decoded instruction, transpose the first source matrix to generate a transposed first source matrix, perform a matrix multiplication using the transposed first source matrix and the second source matrix to generate a result, and store the result in a destination matrix location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.