Resource sharing by two or more heterogeneous processing cores
US12405823B2 · kind B2 · utility
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Key dates
| Filing date | Nov 8, 2019 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Jul 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/526
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus, systems, and techniques to share memory. In at least one embodiment, a processor comprises one or more circuits to allocate memory to at least two heterogeneous processing cores in response to performing one or more instructions associated with one or more application programming interfaces based, at least in part, on one or more attributes associated with the at least two heterogeneous processing cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.