Semiconductor structure and method for manufacturing same
US12408378B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2022 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Jan 6, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
Abstract
A semiconductor structure includes: a base, including bit lines extending in a first direction and semiconductor channels on the bit lines that are respectively arranged at intervals, in which a semiconductor channel includes a first region, a second region and a third region arranged in sequence; a dielectric layer, located between two adjacent ones of the bit lines and on a surface of the semiconductor channel; a first gate layer, surrounding the dielectric layer of the second region and extending in a second direction; a second gate layer, surrounding the dielectric layer of the third region, which is spaced apart from the first gate layer in the direction perpendicular to the top surface of the bit line; and an insulation layer, located between the adjacent semiconductor channels on the same bit line and isolating the first gate layers and the second gate layers on the adjacent dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.