Semiconductor structure with high integration density and method for manufacturing the same
US12408425B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2023 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Apr 17, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
A semiconductor structure includes: a substrate; a first fin and a second fin disposed on the substrate and spaced apart from each other; a dielectric wall disposed on the substrate and having first and second wall surfaces; a third fin disposed on the substrate to be in direct contact with at least one of the first and second fins; a first device disposed on the first fin and including first channel features extending away from the first wall surface; a second device disposed on the second fin and including second channel features extending away from the second wall surface; at least one third device disposed on the third fin and including third channel features; and an isolation feature disposed on the substrate to permit the third device to be electrically isolated from the first and second devices. A method for manufacturing the semiconductor structure is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.