Circuits designed and manufactured with first and second design rules
US12408426B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 3, 2021 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Nov 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/8311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) including a plurality of finfet cells designed with digital circuit design rules to provide smaller finfet cells with decreased cell heights, and analog circuit cell structures including first finfet cells of the plurality of finfet cells and including at least one cut metal layer. The smaller finfet cells with decreased cell heights provide a first shorter metal track in one direction and the at least one cut metal layer provides a second shorter metal track in another direction to increase maximum electromigration currents in the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.