Patent · US Active

Systems and methods to generate a cache miss ratio curve where cache data has a time-to-live

US12411777B2 · kind B2 · utility

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12Claims
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Key dates

Filing dateNov 7, 2022
Grant dateSep 9, 2025
Priority date
Expiry dateMar 31, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/601
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

For a given application, increasing the size of a cache is beneficial up to a certain point and the number of hits does not increase significantly with a greater cache size. This disclosure provides a method to determine a miss ratio curve, for a cache having data blocks with a time-to-live. A hashed value of a data block's key address can be used to generate a 2D HLL counter for storing expiry times of the data blocks. The 2D HLL counter can be converted to a 1D array, from which a stack distance can be calculated. A frequency distribution of stack distances can then be converted into a miss ratio curve, from which an appropriate cache size can be selected.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.