Interrupt latency and error resilient full-duplex SPI driver
US12411797B2 · kind B2 · utility
0Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2023 |
| Grant date | Sep 9, 2025 |
| Priority date | — |
| Expiry date | Oct 17, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of transmitting data between a host and a peripheral device using Serial Peripheral Interface protocol is disclosed. The host and peripheral device redefine the interrupt signal so that it serves as a traditional interrupt signal during most times, but during certain parts of the transmission, it serves as a READY signal, indicating that the host should wait before sending the payload. In this way, transmissions are performed where the likelihood of data loss is greatly reduced or eliminated. Further, because the peripheral device is able to stall the host, full duplex transmissions are made possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.