Effective metal density screens for hierarchical design rule checking (DRC) analysis
US12412020B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2022 |
| Grant date | Sep 9, 2025 |
| Priority date | — |
| Expiry date | Jan 11, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the invention include systems and methods configured to provide hierarchical circuit designs that makes use of effective metal density screens during hierarchical design rule checking (DRC) analysis. A non-limiting example computer-implemented method includes providing a first hierarchical level of a chip design. The first hierarchical level includes one or more internal shapes and at least one blockage shape having an internal structure defined at a second hierarchical level of the chip design. A tuple is assigned to the blockage shape. The tuple includes a metal layer identifier for the blockage shape, a minimum expected density for the blockage shape, and a maximum expected density for the blockage shape. The method includes determining whether a density violation exists in the first hierarchical level based in part on one or both of the minimum expected density for the blockage shape and the maximum expected density for the blockage shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.