Differential comparator circuit
US12413219B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2023 |
| Grant date | Sep 9, 2025 |
| Priority date | — |
| Expiry date | Jan 16, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/56
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A differential comparator circuit includes a voltage amplifier of negative gain receiving an analog input signal and generating an inverted analog input signal. The analog input signal and the inverted analog input signal form differential analog input signals. A comparator input circuit includes a first capacitive divider to generate a first signal as an average of the analog input signal and a first ramp signal, and a second capacitive divider to generate a second signal as an average of the inverted analog input signal and a second ramp signal, with the first and second ramp signals being differential ramp signals. The comparator is configured to compare the first and second signals to generate a signal transition having a timing based on the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.