Electronic devices having glass layers with scratch resistant coatings
US12416745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2022 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Feb 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K5/0017
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
An electronic device may be surrounded by an exterior region and may have an interior region. Electronic components may be mounted in the interior region. Housing walls such as housing walls formed from transparent layers of material may separate the interior region from the exterior region. A display may be visible through one of the transparent layers of material. A transparent layer of material may be coupled to housing structures in the device and may be formed of glass or glass-ceramic. The transparent layer may have two opposing chemically strengthened surface layers of different thicknesses. A coating may be formed on a thinner of the two opposing chemically strengthened surface layers. The coating may have an oleophobic outer coating layer, an antireflection layer, and an antiscratch layer. The antiscratch layer may have one or more compressively stressed dielectric layers and may have one or more corresponding graded composition layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.