Failure recovery in a fault tolerant architecture
US12417155B2 · kind B2 · utility
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27Claims
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Key dates
| Filing date | Dec 29, 2023 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Dec 29, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system/process provides fault tolerance to an integrated component system which integrates core components of a transaction processing system into a single processing platform, i.e., a single server, enabling elimination of the network interconnects and associated latencies introduced thereby in favor of much faster interconnects, such as inter-process communication and shared memory communication messaging, where a failure of any one component necessitates failing over the entire system to a backup thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.