Patent · US Active

Storage device and data processing method

US12417175B2 · kind B2 · utility

0Cited by
8References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 9, 2023
Grant dateSep 16, 2025
Priority date
Expiry dateJun 9, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1024
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A storage device includes a non-volatile memory, a buffer memory, and a storage controller. The controller receives first host data indicating a first logical block address range of the non-volatile memory from a host device, reads first memory data from the non-volatile memory using the first logical block address range, and stores the first memory data in the buffer memory. The storage controller further receives a read command and a read address from the host device, determines whether the read address is within the first logical block address range, read, in response to the read address being determined as within the first logical block address range and the read command, the first memory data from the buffer memory, without accessing the non-volatile memory, and outputs the first memory data from the buffer memory to the host device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.