Systems and methods for aperture-specific cache operations
US12417181B1 · kind B1 · utility
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Key dates
| Filing date | May 15, 2024 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | May 15, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing device including a first cache is coupled to a system memory and a parallel processing unit (PPU) including a second cache. An operation to modify cache lines of the second cache associated with a first aperture of the system memory is received. A first subset of cache lines of the second cache is identified. The first subset of cache lines is associated with the first aperture of the system memory and is different from a second subset of cache lines of a second aperture of the system memory. The first subset of cache lines is modified as specified by the cache operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.