Lithography simulation using a neural network
US12417334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2022 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Apr 2, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/09
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
As integrated circuit geometries have shrunk, lithography simulation has developed to ensure that the masks used to fabricate the circuits satisfy the chip yield and fabrication turnaround time targets. To manufacture an integrated circuit (chip), an initial layout for the integrated circuit design is processed to compute a wafer image (e.g., resist material “printed” on the wafer using photomasks). Lithography simulation processes the initial layout according to optical physics to compute an estimated wafer image without actually constructing the physical masks or consuming any wafer fabrication resources and may be used to confirm manufacturability of the design layout before it is fabricated. Performing lithography simulation using a dual-band neural network produces accurate results efficiently. Dual-band refers to a dual frequency band processing whereby the input layout (mask image) is separately processed by both a first and second branch to extract low-frequency (global) features and high-frequency (local) features, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.