Low parasitic inductance power module featuring staggered interleaving conductive members
US12417967B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2022 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Jan 5, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low parasitic inductance power module featuring staggered interleaving conductive members, including: at least one base extending in a length direction; a substrate on which at least one input bus bar and at least one output bus bar are provided; a first unit including a first circuit base portion disposed on the base in a width direction, a plurality of first power devices being disposed on the first circuit base portion, each first power device having a first current input end and a first current output end which are parallel connected, the first current input end or the first current output end being conducted to the first circuit base portion; and a second unit. The units are serially-connected to the bus bars via input conductive members and output conductive members arrayed in a staggered interleaving mode, whereby to create individual inductances counteracting with each other, reducing overall parasitic inductance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.