Receiver circuit
US12418286B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2023 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Nov 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45511
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver circuit comprising: an input-pin; a receiver-input-node; a ground-pin; an internal-node that is connected to the input-pin; and a MOSFET. The MOSFET has a conduction channel connected in series between the internal-node and the receiver-input-terminal; and a gate terminal, the voltage at which sets the conductivity of the conduction channel. The receiver circuit also includes an amplifier that: has an input terminal that is connected to the internal-node; and provides a voltage control signal to the gate terminal of the MOSFET such that the voltage at the internal-node with respect to the ground-pin is constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.