Patent · US Active

Sigma-delta analogue to digital converter

US12418302B2 · kind B2 · utility

0Cited by
2References
17Claims
0Family size

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Inventors

Key dates

Filing dateAug 24, 2023
Grant dateSep 16, 2025
Priority date
Expiry dateApr 1, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M3/39
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A sigma-delta ADC comprising: a first-input-resistor connected in series between a first-input-terminal and a first-feedback-node; a second-input-resistor connected in series between a second-input-terminal and a second-feedback-node; a third-input-resistor connected in series between a third-input-terminal and a third-feedback-node; a first-multiplexer-switch connected in series between the first-feedback-node and a first-amplifier-second-input-terminal; a second-multiplexer-switch connected in series between the second-feedback-node and a first-amplifier-first-input-terminal; a third-multiplexer-switch connected in series between the third-feedback-node and the first-amplifier-second-input-terminal; a first-feedback-current-source having a first terminal and second terminal, wherein the second terminal is connected to a reference-terminal; a second-feedback-current-source having a first terminal and second terminal, wherein the second terminal is connected to the reference-terminal; a first-feedback-selection-switch connected in series between the first-feedback-node and the first terminal of the first-feedback-current-source; a second-feedback-selection-switch connected in serie…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.