Full parallelization and enablement of random order computation of cryptographic hashes
US12418401B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2023 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Feb 2, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0643
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods efficiently process digests, hashes or other results by performing multiplicative functions in parallel with each other. In various embodiments, successive processing stages are provided for calculating a plurality of powers of the common value, processing each of a plurality of pairs of first and second elements of the input values, wherein the processing comprises multiplying the first elements of the input values by the common value and combining the products with second elements of the input values, performing additional processing using the plurality of processed pairs as the subsequent set of input values and using a power of the common value, multiplying each of the processed pairs with one of the plurality of powers of the common value to generate a set of output values, accumulating the set of output values, and providing the digest as a function of the set of output values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.