Patent · US Active

Semiconductor structure, manufacturing method therefor and memory

US12419058B2 · kind B2 · utility

0Cited by
11References
15Claims
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Key dates

Filing dateJul 5, 2022
Grant dateSep 16, 2025
Priority date
Expiry dateFeb 18, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N50/10

Abstract

A semiconductor structure, a manufacturing method therefor and a memory are provided. The semiconductor structure may at least include: a plurality of aligned transistors, in which the transistors share a same source plate, channels of the transistors are located above the source plate, the channel length direction of the transistors is perpendicular to a surface of the source plate, and a material of the channels includes a single crystal semiconductor; a plurality of drain contacts, electrically connected with drains of the transistors, in which even number of the transistors share one same drain contact; and a plurality of magnetic tunnel junctions, located on the drain contacts and electrically connected with the drain contacts in one-to-one correspondence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.