Increased throughput for writes to memory
US12422992B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2024 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Feb 8, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for write operations to memory include starting write operations for writing n words in a same row, including loading a first word of the n words during a first clock cycle, where n is an integer greater than 1; loading one or more additional words of the n words, each during a corresponding one or more additional clock cycles; triggering the n words to be stored in the memory; and closing the write operations for the writing of the n words during a final clock cycle, whereby the n words are written in n+1 clock cycles consisting of the first clock cycle, the corresponding one or more additional clock cycles, and the final clock cycle. The write circuitry performing the aforementioned operations can also perform write operations for a single word in two clock cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.