Code generation based on processor usage
US12423076B1 · kind B1 · utility
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39Claims
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Key dates
| Filing date | Oct 12, 2021 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | May 18, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses, systems, and techniques to generate code to be performed by one or more first processors based, at least in part, on one or more indications of data to be used by one or more second processors. In at least one embodiment, a CUDA program includes host code and device code, and a linker uses references for code elements in host code to link or prune code elements from device code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.