Power semiconductor module
US12424533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2023 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | May 1, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3735
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor module includes a first and second insulating substrate, which is arranged parallel to and at a distance from the first insulating substrate. The first insulating substrate and the second insulating substrate each include an insulating layer, an inner metallization layer, and an outer metallization layer. The power semiconductor module also includes a first cooling device, which is arranged thermally conductively on the outer metallization layer of the first insulating substrate, a second cooling device, which is arranged thermally conductively on the outer metallization layer of the second insulating substrate. The power semiconductor module also includes a power semiconductor, arranged between the first insulating substrate and the second insulating substrate. At least one of the two insulating substrates include a through-contact, by which the inner metallization layer of the corresponding insulating substrate is electrically connected to the outer metallization layer of the corresponding insulating substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.