Partially bootstrapped gate driving circuit for reducing switching loss and control method thereof
US12424926B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 9, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Sep 23, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention belongs to the technical field of gate driving circuits, and discloses a partially bootstrapped gate driving circuit for reducing switching loss and a control method thereof. The partially bootstrapped gate driving circuit for reducing the switching loss comprises a switching device, PWM, a power supply, signal isolation, non-isolated driving chips, a bootstrap structure, a driving resistor, Mon and Moff. The bootstrap structure is used in the present invention, which can realize voltage doubling output without increasing the power supply, overcomes limitation of parasitic resistance inside a large gate of a wide band gap device, and can significantly reduce the switching loss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.