Methods and apparatus to reduce error in operational amplifiers
US12424981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Oct 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An example device includes: switch circuitry configured to: connect, in a first state based on a control signal, a first switch input to a first switch output and a second switch input to a second switch output; and connect, in a second state based on the control signal, the first switch input to the second switch output and the second switch input to the first switch output; an operational amplifier configured to: generate, in response to the control signal, a first voltage based on a gain and the connections in the first state; and generate, in response to the control signal, a second voltage based on the gain and the connections in the second state; and an Analog to Digital Converter (ADC) configured to convert the first voltage and the second voltage into a digital value based on a multiplication of the input voltage and the gain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.