Distortion reducing precoding
US12425971B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2025 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Mar 12, 2045 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0425
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus may be configured to receive a signal to be transmitted via an array of antennas by a zero-forcing precoder, wherein the signal is processed by the linear precoder based on one or more input power criteria for power amplifiers of the array of antennas; apply a distortion reducing matrix to the processed signal, wherein the distortion reducing matrix is trained to reduce the distortion at each output of the power amplifiers based on minimizing an error signal corresponding to a difference between measured and calculated outputs of the power amplifiers after a coupling effect between the power amplifiers based on the applied matrices; and provide an output of the distortion reducing matrix to be used in digital pre-distortion processing of an input signal for the power amplifiers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.