Semiconductor structure and method for forming same
US12426237B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 18, 2023 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Mar 15, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
Abstract
A method for forming a semiconductor structure includes the following operations. A substrate is provided. The substrate includes double heterostructures arrayed along a first direction and a second direction. Each of the double heterostructures includes a first semiconductor layer, a second semiconductor layer and another first semiconductor layer sequentially arranged along the first direction. A forbidden band gap of the first semiconductor layer is different from a forbidden band gap of the second semiconductor layer. The first direction is perpendicular to the second direction, and both the first direction and the second direction are parallel to a direction of a plane where the substrate is located. A double gate structure is formed on sidewalls of each of the double heterostructures along the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.