Patent · US Active

Semiconductor structure, method for manufacturing semiconductor structure, and memory

US12426251B2 · kind B2 · utility

0Cited by
1References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 10, 2023
Grant dateSep 23, 2025
Priority date
Expiry dateMay 26, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/482

Abstract

A semiconductor structure, a method for manufacturing a semiconductor structure, and a memory are provided. The semiconductor structure includes a substrate, a plurality of active pillars arranged above the substrate, a storage structure, and a plurality of transistors. The active pillars are arranged in an array in a first direction and in a second direction. Each active pillar includes a first sub active pillar and a second sub active pillar arranged on the first sub active pillar. The first direction and the second direction intersect with each other and are both parallel to a top surface of the substrate. A material of the first sub active pillar includes a first element, and resistivity of the first sub active pillar including the first element is less than resistivity of the first sub active pillar absence of the first element. The storage structure covers a sidewall of the first sub active pillar.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.