Semiconductor device
US12426308B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Nov 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0184
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device may include a first active pattern on a substrate, a pair of first source/drain patterns on the first active pattern and a first channel pattern between the first source/drain patterns, the first channel pattern including first semiconductor patterns, which are spaced apart from each other in a stacked formation, a gate electrode on the first channel pattern, a first gate cutting pattern adjacent to the first channel pattern that penetrates the gate electrode, and a first spacer pattern between the first gate cutting pattern and the first channel pattern. The first spacer pattern may include a first remaining pattern adjacent to an outermost side surface of at least one of the first semiconductor patterns and a second remaining pattern on the first remaining pattern. The second remaining pattern may be spaced apart from the first gate cutting pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.