Array substrate, manufacturing method and display device
US12426375B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 28, 2023 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Feb 28, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate includes a driving circuit arranged on the base substrate, and the driving circuit includes a pull-up node control circuit, a first pull-down node control circuit, and an output circuit; the pull-up node control circuit controls a potential of the pull-up node; the first pull-down node control circuit controls to write a first control voltage provided by the first control voltage line into the first pull-down node; the output circuit controls the driving signal output terminal to output a driving signal under the control of the potential of the pull-up node; the array substrate also includes a first conductive portion arranged on the base substrate; the first conductive portion is electrically connected to the first control voltage line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.