Data storage device and method for performing error recovery
US12430193B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 10, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Nov 28, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes an interface circuit to process reception signals received from a peer device and transmission signals to be transmitted to the peer device. The interface circuit includes at least one signal processing circuit to perform an error recovery procedure when an error has occurred in the data storage device. When performing the error recovery procedure, the signal processing circuit performs an operation of periodic line reset to repeatedly transmit a line reset signal to the peer device within a predetermined period until the predetermined period expires or another line reset signal representing an acknowledgment of the line reset signal has been received from the peer device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.