Capacitor structure with via embedded in porous medium
US12431291B2 · kind B2 · utility
0Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Mar 19, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A capacitor structure that includes a substrate; a conductive layer above the substrate; and a porous layer, above the conductive layer, having pores that extend perpendicularly from a top surface of the porous layer toward the conductive layer. The porous layer comprises a first region in which pores conductive wires are disposed, and a second region in which pores a metal-insulator-metal (MIM) structure is disposed. The first region may be used as a via to contact a bottom electrode of the capacitor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.