Electronic circuit with a transistor device and a clamp circuit and method
US12431886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Oct 30, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0072
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic circuit and a method are disclosed. The electronic circuit includes: a first transistor device having a load path between a first load path node and a second load path node; and a clamping circuit connected to the load path of the first transistor device. The clamping circuit includes: a second transistor device having a load path connected in parallel with the load path of the first transistor device, and a control node; and a drive circuit configured to drive the second transistor device. The drive circuit includes a clamping element and a resistor connected in series between the first and second load path nodes of the first transistor device. The drive circuit is configured to drive the second transistor device dependent on a voltage across the resistor. The first transistor device and the clamping circuit are integrated in a same semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.