Time-interleaved current-based digital-to-analog converter (current DAC)
US12431911B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Jun 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/747
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A time-interleaved current-based digital-to-analog converter (current DAC) cell includes first input circuitry configured to receive a digital input signal, a first biasing voltage, a first clock, and a second clock. The first clock and the second clock having a phase offset from one another and having a common period. The current DAC also includes a first gate configured to, responsive to an ‘ON’ state of the first clock, pass the digital input signal to a second gate, the second gate being configured to, responsive to an ‘OFF’ state of the second clock, output a first DAC cell activation signal. The current DAC further includes first output circuitry configured to, responsive to the first DAC cell activation signal, output a first analog current signal based on (i) the digital input signal and (ii) the first biasing voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.