Multiplexer and serializer including the same
US12431997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2022 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Aug 3, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018507
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiplexer selects one of a first to a fourth data signal in response to a first to a fourth pulse. The first to fourth pulses respectively correspond to the first to fourth data signals and sequentially toggle. The multiplexer includes: (1) a NAND gate that receives the first data signal, a fourth complementary data signal that is a complementary signal of the fourth data signal, and the first pulse and outputs a first gate signal and (2) a NOR gate that receives the first data signal, the fourth complementary data signal, and a first complementary pulse that is complementary to the first pulse and outputs a second gate signal. The first data signal corresponds to a rising edge of the first pulse, and the fourth complementary data signal corresponds to a rising edge of the fourth pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.