Semiconductor structure and method for manufacturing same
US12432940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2022 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Jan 23, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
A method for manufacturing a semiconductor structure comprises: forming a stacked structure on a base having an array area and a peripheral area; forming a first mask layer on the stacked structure, in which the first mask layer corresponding to the array area has a first pattern; ion doping the first mask layer on the array area to obtain a doped first mask layer; and etching the stacked structure through the doped first mask layer to transfer the first pattern to the stacked structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.