HEMT transistor with gate extension
US12432957B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2020 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Apr 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
Abstract
A high-mobility field-effect transistor, includes a stack along a Z axis, deposited on a substrate and comprising a buffer layer, a barrier layer, a heterojunction between the buffer layer and the barrier layer, and a two-dimensional electron gas localized in an XY plane perpendicular to the axis Z and in the vicinity of the heterojunction, a source, a drain, and a gate deposited on an upper face of the barrier layer, between the source and the drain, a first dielectric layer having a relative permittivity εr and a thickness e which are such that: 0.5 nm≤e/εr≤2 nm, a metal pad arranged between the gate and the drain and deposited on the first dielectric layer, the metal pad being electrically connected to the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.