Semiconductor device including substrate layer with floating base region and gate driver circuit
US12432988B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Apr 6, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
A semiconductor device includes a substrate layer having a floating base region of a first conductivity type. A first well of a second conductivity type and the floating base region form a first pn junction. A first conductive structure is electrically connected to the first well. A barrier region of the second conductivity type and the floating base region form an auxiliary pn junction. A second conductive structure is electrically connected to the floating base region through a rectifying structure. A pull-down structure is configured to produce a voltage drop between the barrier region and the second conductive structure, when charge carriers cross the auxiliary pn junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.