Integrated circuit devices
US12432993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Apr 3, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
An integrated circuit (IC) device includes a fin-type active region extending long in a first lateral direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region, and a source/drain region adjacent to the gate line on the fin-type active region, the source/drain region. The source/drain region includes a lower source/drain region and an upper source/drain region. The lower source/drain region includes at least one silicon isotope selected from silicon isotopes of 28Si, 29Si, and 30Si, and the upper source/drain region includes a 28Si element at a content higher than a content of the 28Si element in the lower source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.