Display panel manufacturing method and display panel
US12433022B2 · kind B2 · utility
0Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Jan 6, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/857
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present application discloses a display panel manufacturing method and a display panel including a driver transistor, a storage capacitor, a switch transistor, and a sensing transistor vertically stacked. At leas two transistors are vertically stacked to solve a technical issue that a pixel in a conventional display panel employs a pixel circuit design of transistors and capacitors arranged along a direction parallel to the display panel to cause a lowered pixel density of the display panel to result in a lowered resolution of a display panel product.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.