Shift registers
US3937984A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 1974 |
| Grant date | Feb 10, 1976 |
| Priority date | — |
| Expiry date | Oct 7, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/186
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register stage comprises an MOS gating transistor having its drain and source electrodes connected respectively to an input node receiving pulses to be shifted through the stage and a gate electrode of an MOS amplifying transistor. A capacitor is connected between the gate and source electrodes of the amplifying transistor. The source electrode of the amplifying transistor constitutes the output of the stage and is connected to the drain electrode of a current source transistor having its source electrode connected to an earth line and its gate electrode connected to a reference potential. The gate electrode of the gating transistor is connected to receive a first series of clock pulses, and the drain electrode of the amplifying transistor is connected to receive another series of clock pulses in non-overlapping relation with the first series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.