Digital circuit for generating output pulses synchronized in time to zero crossings of incoming waveforms
US3946323A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 25, 1974 |
| Grant date | Mar 23, 1976 |
| Priority date | — |
| Expiry date | Jul 25, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0334
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital phase locked loop circuit for use in synchronizing output timing pulses with the positive going zero-crossings of an input data signal by quantitizing the input analog data signal as digital information, storing the digital information at given times by timing pulses, pre-programming a counter with a count corresponding to the quantitized digital information stored, and advancing or lagging an updated timing pulse in accordance with the timed count of the program counter which count is synchronized with the zero-crossings of the input data signal, whereby the updated timing pulses move to synchronism with the zero-crossings of the input data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.