JFET optical sensor with capacitively charged buried floating gate
US3947707A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1974 |
| Grant date | Mar 30, 1976 |
| Priority date | — |
| Expiry date | Jun 12, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F77/162
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An electronic solid state device comprising a layer in which the electrical conductivity is controlled by a plurality of isolated discrete regions distributed within the bulk of the layer and forming potential barriers with semi conductor material of the layer surrounding the discrete regions. Electrical charge is stored in the layer by the discrete regions and the charging is obtained by the application of a potential pulse across the discrete regions. In a preferred operational mode the charging potential is applied such that current conduction paths in the layer are blocked by the depletion regions associated with the potential barrier for applied interrogation potentials across the regions of substantially smaller magnitude than the charging pulse. The device may consist of an imaging device having high charges gain and particular embodiments described consist of an image intensifier, an imaging active photocathode and a target plate of a vidicon camera tube.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.